In digital memory a cross hatch of X and Y coordinates is addressed
for either turning on or
turning off the juncture therefore making it a value of (1) or a value of
(0). Memory bits are placed wherever the
address buffer finds available and open coordinates therefore assigning an
address to a non charged X-Y
coordinate as a (0) and to a charged X-Y coordinate as a (1.) Groupings of
these cross hatch stored single value
bits are combined to form bytes of memory, each byte representing by it's (0)
and (1) combinations a definitive
object representational to an observable object to later be converted for
display and understanding of the human
operator. Digital memory is not sensitive to time placement and is also not
indicative of an intrinsic value for each
memory location other than off or on. Memory of this nature requires larger
amounts of memory to denote a single
variable value.
In the quantum computational system memory is time sensitive. It is
in memory in order to the
time it was injected into memory. Thus making all memory before it in the
memory path older' and all memory
after it in the memory path newer.' Since the memory is time sensitive there
is another difference between
quantum memory and digital memory.
Digital memory requires another byte of memory to be assigned to a
byte of memory to denote
time sensitivity. Quantum memory is already time sensitive. In digital memory
the time byte can be accessed and
result in the retrieving of all memory equal to the same time frame as
defined by the time code. But in quantum
memory, memory is in order of input and to locate a memory by it's time it
takes reference to the value of the
memory instead of the time of the memory. This causes the necessity for a
search process to access each stack
of memory searching for equal values. More on this later.
In the quantum computational system memory is formed by the
comparison of input to the first
memory level. Long term memory. Long term memory is permanent memory limited
only by the designed
amount of memory assigned to the pathway which varies by the requirements of
the input type. In the beginning
of a quantum system there is no resident memory as there is no past for the
device. So input is compared to
nothing and is passed on as the value of the input without comparison. This
value is sent to the second memory
or mid term memory. Mid term memory is set to be a maximum of 18 hours
duration in a full operating system,
less for prototype and testing devices. As memory values enter the mid term
memory they are pushed along the
pathway to the next neuron-capacitor combination storage device at the rate
determined for that memory level.
See The Quantum Wave Function for duration of wave events.
As the memory reaches the end of the determined pathway it is
expelled from the pathway. Long
term memory acts in the same manner but stores a much longer duration of time
sensitive memory values. Mid
term memory is a holding area where the 2nd comparator can search for similar
values similar to the 1st
comparator searching for similar values in the long term memory. The result
of the 2nd comparator's search
process and computation of the non exact matches is sent to the third memory
or short term memory. The short
term memory is just that. Quite short. Short term memory is resident only in
humans and conscious quantum
designs and has a time duration of seven seconds.
The memory values in short term memory are not searched and as such
they are in-out in the
order in which they were placed into the memory. The output of the short term
memory is the memory compared
to the mid term memory who's result is sent to the short term memory. This
back-action or feed back loop of
memory is what causes self awareness, and the ability to question results and
the ability to predict potential.
It is necessary to understand the growth in memory size by the
level it represents. Using the
example of one second duration of memory the first or long term memory will
store 60 values of memory. The
second level of memory will also store 60 values of memory but the short term
memory will store 1800 values
of memory. With long term and mid term functioning at 30:1 of input (one half
second duration input samples)
and the third memory functioning likewise 30:1 of the previous 30:1
comparison rate short term memory even
though only seven seconds in duration is quite a bit larger in size than long
and mid term memories.
The 8000 processor prototype device requires long term memory to
equal a minimum of one
month's worth of storage in order to acquire observable learning results.
That is based on an 6 hour day. At that
rate with 60 values per input receptor x3 (for pathways assigned to the
receptor) each receptor will require a
minimum of 64,800 cells per hour or 388,800 memory storage cells for each day
or a total of 11,664,000 memory
storage cells for the one month duration of memory per pathway.
Mid term also requires the same count but at only 18 hours total
it's compliment of memory
storage cells is just 388,800 cells per input receptor.
Short term on the other hand is memory that is essentially
functioning at 900:1 of input. So at
1800 values per second x3 (for pathways assigned to the receptor) each
receptor will require a maximum of
37,800 cells per seven second duration.
In the 8000 processor prototype the memory sizes as shown above
will be
Long Term: 349,920,000 memory cells.
Mid Term: 6,998,400 memory cells.
Short Term: 302,400,000 memory cells.
At these rates memory chips manufactured for the prototype will be
designed to accommodate
6 million cells per chip. Making:
Long Term: 60 chips.
Mid Term: 2 chips
Short Term: 50 chips
Since the prototype is concerned with the process of thinking and
consciousness and not so
much the process of motion or memory of motion three level pathways will be
used in VIR sensor inputs only for
vision and hearing. Motion of the prototype's head' unit and speech outputs
will be single pathway computational
protocol. This permits the limited amount of processor pathway input
receptors to be concentrated in the vision
and hearing sections of the device thereby increasing the clarity of both
input sources.
The initial design of the prototype will be built to accommodate
increases in long term memory
as budgetary constraints permit. Memory expansion is as simple as plugging in
a memory board at the end of the
memory pathway and extending the pathway by the count of memory cells
contained on the board. Each memory
board will hold 30 memory chips. Comprising a total of 210,000,000 cells.
Making the addition of a memory
board to long term memory an essential increase in 6 hour day long term
memory of 15 days duration or an
increase in the length of the average work day.
Initially long term memory will require two memory boards.
Mid term memory will require 1 partial memory board.
Short term will require two memory boards.
At this configuration the prototype will be able to display
subconscious awareness of other
devices (living and not living) and conscious awareness of self.
The ENTICY1 prototype will be designed to hold a total of the
maximum 1 partial mid term
memory boards, the maximum 2 short term memory boards and the maximum of 250
long term memory boards.
That means the prototype will be capable of being expanded to long term
memory of 7 years 4 months.
